1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the device. In particular, the present invention relates to a technology effective for application to the fabrication technology of stacked semiconductor devices in which a semiconductor device is stacked on the upper surface of a semiconductor device.
2. Description of the Related Art
Surface-mount semiconductor devices referred to as BGA (Ball Grid Array) constructions and LGA (Land Grid Array) are known in the art as package configurations for realizing semiconductor devices of greater integration as well as smaller size and lighter weight.
In this type of semiconductor device, semiconductor elements (semiconductor chips) are affixed to a wiring board. In this type of semiconductor device, the electrodes of semiconductor chips and connection pads that are formed by the wiring of the wiring board are connected by conductive wires (connection means). The semiconductor device is further of a configuration in which the semiconductor chips and wiring are covered by an encapsulant composed of insulating plastic.
To improve productivity, a fabrication method is adopted that employs the so-called blanket molding. In this fabrication method, a wiring mother board is prepared in which product formation areas for fabricating semiconductor devices are aligned horizontally and vertically. In this fabrication method, a semiconductor chip is affixed to each product forming part and wire connections then constructed. In this fabrication method, the entire wiring mother board is covered by an insulating plastic, following which the wiring motherboard is cut vertically and horizontally together with the plastic to produce a plurality of semiconductor devices. As the connection means, a method also exists in which each electrode of a semiconductor chip is flip-chip connected to connection pads of the wiring board.
As another method for realizing semiconductor devices of greater integration and smaller size, Japanese Patent Laid-open Publication No. 172157/2004 or Japanese Patent Laid-open Publication No. 273938/2004 adopt methods of stacking semiconductor chips on which, for example, ICs have been formed, or stacking semiconductor devices that have been packaged.
The present inventors have investigated the fabrication of the so-called “package-on-package” stacked semiconductor devices that employ solder balls (external electrode terminals) that are provided on the lower surface of a wiring board to stack packaged semiconductor devices.
Plastic-encapsulated semiconductor devices are typical well-known semiconductor devices. Semiconductor chips are mounted on these semiconductor devices on the upper surface of a wiring board having external electrode terminals on its lower surface. In these semiconductor devices, moreover, the electrodes of the semiconductor chips are electrically connected to the wiring of the wiring board by way of a connection means. The semiconductor devices are further of a configuration in which the semiconductor chip and the connection means are covered by an encapsulant (package) composed of insulating plastic.
When semiconductor devices of this type are stacked, the peripheral portion of the wiring board is caused to protrude to expose a portion of the wiring outside of the encapsulant. A method of fabricating a stacked semiconductor device can then be considered in which these exposed portions of wiring connect with the external electrode terminals (solder bumps) of the semiconductor device (upper semiconductor device) that is stacked on this exposed portion of wiring.
Arranging and stacking two levels of semiconductor chips on the package of the lower semiconductor device in this type of configuration increases the height of the package, and as a result, a bump electrode formed by one solder ball no longer has sufficient height. However, a method can be considered in which a substrate for stacking is arranged in between and solder balls then attached to the upper and lower sides of this substrate to electrically connect the upper and lower semiconductor devices.
However, in a stacked semiconductor device having this type of construction, the height of the stacked semiconductor devices increases and thus complicates the realization of thinner stacked semiconductor devices. In addition, the need for the portion of the wiring board outside of the package for connecting bump electrodes further complicates the realization of smaller stacked semiconductor devices.